Packaged passive silicon photonics chip.
Imec, silicon photonic chip;
Tyndall, fibre array packaging.
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“Imec’s Silicon Photonics platform provides robust performance, and solutions to integrated photonics products. Companies can benefit from imec silicon photonics capability through established standard cells, or explore the functionality of their own designs in MultiProject Wafer runs,” stated Philippe Absil, program director at imec. “With this collaboration MOSIS will offer its first access to a mature Silicon Photonics infrastructure, with the option for follow on production” added Wes Hansford, MOSIS Director.
The first ePIXfab-Europractice run for passive silicon photonics ICs is open for registration from June 2013 with design deadline September 9th 2013. MOSIS' customers can register for this run and obtain the design kit via MOSIS in June 2013.
Imec’s Si Photonics 200mm wafer platform offers extensive design flexibility and includes:
• Tight within-wafer silicon thickness variation 3sigma < 2.5nm
• 3-level patterning of 220nm top Si layer (193nm optical lithography)
• poly-Si overlay and patterning (193nm optical lithography)
• 3-level n-type implants and 3-level p-type implants in Si
• Ge epitaxial growth on Si and p-type and n-type implants in Ge
• Local NiSi contacts, Tungsten vias and Cu metal interconnects
• Al bond pads
• Validated cell library with fibre couplers, polarization rotators, highly efficient carrier depletion modulators and ultra-compact Ge waveguide photo-detectors with low dark current.
• Design kit support for IPKISS framework, PhoeniX Software and Mentor Graphics software
Tyndall’s Si Photonics Packaging Technology enables
• Passive device packaging , single and mult-fibre arrays to grating couplers
• Active device packaging, modulators and detectors with electrical ports and fibre arrays
• Custom packaging requirements (mechanical, thermal stability etc.)
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