Error detection extended.

Anritsu Corporation has released an FEC symbol capture function and Bathtub test capability for its 116-Gbit/s PAM4 Error Detector (ED) MU196040B, offering more functionality for developers of 400-GbE*1 and 800-GbE*2 devices. Installed in their flagship Signal Quality Analyzer-R MP1900A series, these functions can be downloaded from the MP1900A website.

The spread of commercial next-generation 5G mobile communications services enables faster sending and receiving of large video and data files. To support larger and faster transmissions, data centers, which are key infrastructure in 5G mobile networks, are also investigating speed upgrades from the current 100 GbE*3 to 400 GbE and in future to 800 GbE/1.6 TbE standards.

PAM4*4 used in 400 GbE is easily affected by noise and transmission path losses, making it difficult to achieve the previous level of error-free transmissions and requiring use of FEC (Forward Error Correction*5) to correct generated errors and maintain transmission quality.

Consequently, there is increasing need for quantitative measurement of jitter-related signal quality, such as jitter tolerance*6 measurement for evaluating the performance of high-speed devices and transceivers for 400-GbE.

To meet this need and support 400G network evolution, Anritsu has added two new features to its MP1900A - the FEC symbol capture function to evaluate FEC-based network elements, and the PAM4 Bathtub*7 test capability.

In today’s high-speed networks, some low-probability errors are expected in data traffic, errors that are corrected using FEC. The new MP1900A ED function determines if the errors can be corrected by FEC and starts capturing data streams only when the burst errors exceed the FEC uncorrectable threshold. From the captured data, a user can discover what kind of data steam caused the uncorrectable burst errors.

Since the impact of jitter becomes severe as the data-stream baud rate is increased to achieve a higher traffic capacity, Anritsu has added the PAM4 Bathtub test capability to evaluate and quantify the jitter phase margin.

The modular MP1900A running embedded Windows 10 can easily be expanded. As well as supporting 400-GbE and 800-GbE PAM4, it is a market-leading bit error rate tester (BERT) for various high-speed interfaces, including PCI Express Gen5 and USB4, using a full line of modules and application software.

In addition to offering more accurate BER measurements, the MP1900A helps shorten development times for high-speed devices and transceivers.

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