Debugging pioneer joins international architecture foundation.

Ashling Microsystems has joined the RISC-V Foundation, a non-profit corporation controlled by its members to drive the adoption and implementation of the open, free RISC-V instruction set architecture (ISA) forward.

Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. Ashling will demonstrate its first RISC-V IDE to coincide with the 7th RISC-V Workshop Nov. 28 – 30, 2017 in Milpitas (CA USA).

“As a reputable provider of debug tools, we are delighted to welcome Ashling to the RISC-V Foundation as a silver member,” said Rick O’Connor, executive director of the non-profit RISC-V Foundation. “As the RISC-V community continues to grow, the requirement for a complete ecosystem containing a strong suite of support tools is critical.”

“By joining RISC-V, we are demonstrating our support and commitment to open architectures and corresponding ecosystems. We see RISC-V as a great way of leveraging cooperation between industry and academia to advance innovation and prevent vendor exclusivity,” said John Murphy, Managing Director, Ashling Microsystems. “We believe that Ashling has the experience and focused expertise to address all aspects of the RISC-V ecosystem as RISC-V usage extends to cover the whole gamut of applications, from high computing servers to low power embedded systems and IoT.”

In addition to developing custom RISC-V embedded solutions for semiconductor companies leading the way in RISC-V, Ashling can also manage all aspects of the RISC-V ecosystem by providing specialized service and support. This greatly alleviates the support burden for adopters of the RISC-V open architecture, as it frees up developers to focus on product design and launch.

#AshlingMicrosystems #PAuto  @risc_v