Showing posts with label Signal Processor. Show all posts
Showing posts with label Signal Processor. Show all posts

Wednesday, 4 January 2017

Signal Quality Analyser.

Anritsu Corporation has launched the Signal Quality Analyser MP1800A Series 100G-EPON Test Solution. The newly developed 100G-EPON Application Software MX180014A and Signal Quality Analyzer MP1800A support BER measurements of OLT (Optical Line Terminal) and ONU (Optical Network Unit) for the latest 100G-EPON standard.

The explosive increase in broadband services supporting 4K/8K video is just one of the many drivers for the expansion of optical access networks using Passive Optical Network (PON). Such a rapid growth in data traffic is driving the transition of these optical access networks to high-speed 10-Gbit/s PON technology, while simultaneously needing to assess the adoption of the next-generation 100G-EPON standard (IEEE802.3ca) offering bit rates of 25 Gbit/s per signal. As a result, the development of OLT and ONU units for PON systems requires both wideband 25-Gbit/s performance as well as more precise timing and margin measurements due to the shorter time per bit.

The MP1800A is a plug-in modular Bit Error Rate Tester (BERT) for measuring a wide range of interfaces up to multichannel 64 Gbit/s. The MP1800A signal-source multichannel synchronization and skew adjustment functions are optimum for OLT tests requiring high-accuracy timing setting. In addition, high-reproducibility BER measurement is achieved by high-quality output waveforms and high input sensitivity performance. The MX180014A software controls the MP1800A to generate 2ch test-signal burst patterns and set skew. OLT evaluation input sensitivity and timing tests are made easy by the GUI for setting test-signal pattern length and timing.


 @Anritsu #TandM @AnritsuEMEA @NapierPR

Tuesday, 1 November 2016

Analyser is all-in-one USB3.1 receiver test solution!

Anritsu's MP1800A Signal Quality Analyzer now supports the newest USB3.1 Gen2 receiver test standards. The USB3.1 Receiver Test Solution uses the G0373A Adapter and MX183000A High-Speed Serial Data Test Software to support both USB3.1 Gen1 (5 Gbit/s) and Gen2 (10 Gbit/s) receiver Jitter Tolerance tests.

With digital equipment interfaces speeding up and switching to serial technology to handle the high-speed transmission of large data traffic, the performance of the USB interface is coming under increased pressure. Fixed transmission path loss, jitter, equipment compatibility and signal integrity assurance are just some of the requirements that are driving the need for testers with high-quality reference test signals, as well as the ability to communicate with multiple interfaces.

The Signal Quality Analyzer MP1800A is a plug-in modular Bit Error Rate Tester (BERT) supporting measurement of multi-channel wideband interfaces up to 32 Gbit/s. Additionally, high-reproducibility USB3.1 Gen2 receiver tests are implemented using optimized high-quality output waveforms to measure high-speed interfaces.

Combining the G0373A and MP1800A supports generation of signals required by USB3.1 receiver tests as well as BER measurements. The MX183000A software controls the combined MP1800A and G0373A measurement system to set and control the receiver test signals and display the BER measurement results. The combination of the MP1800A, G0373A, and MX183000A offers an all-in-one USB3.1 receiver test solution for assured high-reproducibility. And automated measurement using the Granite River Labs automation software helps lighten test workloads.

@Anritsu #TandM @AnritsuEMEA

Thursday, 9 October 2014

Widest bandwidth high-performance microwave vector signal analyser & fast switching continuous wave signal generator #PXI #PAuto

National Instruments has announced the industry’s widest bandwidth high-performance 26.5 GHz microwave vector signal analyser (VSA) and a fast tuning 20 GHz continuous wave signal generator. The two new instruments complement the extensive NI modular instruments offering and expand the measurement capabilities of the PXI platform. 

High-Performance vector signal analysers deliver a combination of low noise floor, high linearity, and low phase noise. NI’s new 26.5 GHz VSA combines these attributes with up to 765 MHz of instantaneous bandwidth. With the VSA’s bandwidth, engineers can analyse some of the industry’s widest bandwidth signals in a single acquisition including radar pulses, LTE-Advanced transmissions and 802.11ac waveforms. In addition, the VSA’s fast measurement speed helps engineers decrease time to market and ultimately lower their cost of test. Finally, engineers can program the VSA’s user-programmable FPGA with LabVIEW system design software to customise instrument behaviour and address the most advanced RF test applications. 

The new 20 GHz signal generator features an ideal combination of exceptional phase noise and fast tuning time (100 µs). This instrument addresses applications including blocking/interferer generation, high-performance intermodulation distortion test benches and various electronic warfare applications. 


“The NI 20 GHz PXI source offers an excellent combination of phase noise and tuning time in a small form factor – a perfect combination for testing our next-generation radar systems,” said Lennart Berlin, Senior Specialist for Microwave Measurement Techniques at Saab AB. 

Tuesday, 21 September 2010

GPGPU-based digital signal processing applications

GE Intelligent Platforms has announced the latest addition to the AXISLib product family. AXISLib-GPU is a high performance library of optimized math and DSP functions that supports rapid development of the growing number of multiprocessing applications taking advantage of the power of GPGPU (general purpose processing on a graphics processing unit) technology and, specifically, the growing range of rugged, NVIDIA® CUDA™-enabled platforms from GE. AXISLib-GPU complements the existing AXISLib family that comprises AXISLib for Power Architecture™-based systems and the recently-announced AXISLib-x86 for systems based on Intel® processors.

Concurrently, GE Intelligent Platforms is also announcing the 6U OpenVPX CUDA Starter Kit, a complete solution designed to enable the simple acquisition of a complete hardware/software environment for CUDA-based application development.

“AXISLib-GPU provides significant help to our customers in fully exploiting the massive potential of GPGPU technology for demanding digital signal processing applications, offering the highest levels of math and DSP performance,” said Rob McKeel, Vice President, Military & Aerospace Embedded Computing at GE Intelligent Platforms. “Even better, it can help them substantially reduce development time, and thus shorten their time to market. This combination of leading hardware technology and advanced software technology will deliver our customers the sustainable competitive advantage they are looking for.”

AXISLib-GPU supports the development (and, ultimately, speeds the deployment) of high performance DSP and multiprocessing applications on GE’s NVIDIA CUDA-enabled GPGPU platforms such as the IPN250, NPN240 and GRA111. Typical applications include radar, sonar, image processing, signals intelligence and ISR (intelligence, surveillance, reconnaissance). It is a set of signal- and vector processing libraries providing over 500 high performance digital signal processing and vector mathematical functions optimized for NVIDIA’s manycore GPUs and created to help developers maximize system and application performance. AXISLib-GPU features standard APIs for code portability, supporting not only current platforms but also future technology upgrades: this, together with GE’s leadership in long term program support, ensures maximum return on investment and minimum cost of ownership.

AXISLib-GPU can operate in a standalone mode or as an integral software module within the AXIS Advanced Multiprocessor Integrated Software environment which includes an integrated graphical user interface, AXISView, providing task level programming for algorithm development and system visualization. The AXISFlow module provides a high performance interprocessor communication library for high throughput, low latency data movement across multiple fabrics (PCI Express™, Gigabit Ethernet, 10 Gigabit Ethernet, Serial RapidIO® and so on): this permits easy scaling from one to many CPU nodes across a single board, multiple boards in a single chassis and multiple system chassis.

Monday, 21 June 2010

High performance data acquisition & processing

Pentek has announced a new member of its Cobalt product family leveraging Xilinx Virtex-6 FPGAs for high-performance data acquisition and signal processing - the 71660 four-channel data acquisition module. Targeting radar and communications applications requiring next-generation performance, the product is a natural successor to Pentek's popular Virtex-5 FPGA 7150 board family, improving signal quality and tripling DSP resources.

"The 71660 delivers critical performance levels previously unattainable and provides an excellent technology-insertion path for existing applications,"
said Rodger Hosking, vice president of Pentek. "Its four front-end data acquisition channels offer the industry's highest resolution, and the back-end PCI Express interface offers at least four times the throughput of previous PCI-X interfaces. Between them lies a Xilinx Virtex-6 FPGA with over 2000 DSP slices to handle the toughest real-time signal processing tasks. We've built in several popular data acquisition features inspired by customers using our earlier-generation boards."

"Pentek is taking full advantage of the Virtex-6 family's functionality in their Cobalt product line, achieving sustained data throughput at 80% of the built-in PCI Express interface's theoretical peak data rate,"
said Xilinx senior manager, Platform Solutions, Raj Seelam. "They are also able to leverage the Virtex family's reduced power requirements to create boards that will support any Virtex-6 FPGA the customer requires."

High Performance Data Acquisition
The four 200 MSPS, 16-bit data acquisition channels of the 71660 deliver nearly 90 dB of spurious free dynamic range, allowing users to detect small signals of interest surrounded by large interferers. The channels operate from a common clock that can come from an external source or an on-board, programmable, crystal-controlled oscillator. An external clock can also be used as a phase-lock reference for the internal oscillator. The 71660 also utilizes two sync and two gate/trigger signals for synchronizing data acquisition channels across multiple modules.
Modular Memory

Four independent memory banks provide the 71660 with a capacity of up 2 GB of DDR3 SDRAM for applications requiring deep memory, or up to 32 MB of QDRII+ SRAM for applications requiring fast random access. The memory can also be configured to offer two banks of each type, giving users the flexibility to accommodate complex applications. Built-in functions of the memory controller include multi-channel ADC data capture, data streaming, and tagging of data streams with metadata packets that include channel ID, sample count and time stamp information.

Turnkey Functionality with User Configurability
The Virtex-6 FPGA on the 71660 provides customers with a combination of turnkey and custom functionality. Customers can select the specific FPGA device installed, ranging from the lower-cost LX130T to the high-performance SX475T with up to 2016 DSP slices. The board ships with the FPGA configured to provide synchronization, triggering, multiplexing and data acquisition features including a complete radar range gate engine. Users can immediately take full advantage of these advanced 71660 features with no additional FPGA programming. In even with the smallest member of the Virtex-6 family, these built-in functions occupy no more than 40% of the FPGA's resources, providing users with ample opportunity to add their own IP.

The FPGA controls and implements data flow paths for all resources on the board, giving users full command of board operation when desired. Users can configure the FPGA using Pentek's GateFlow Design Kit. The Cobalt version of GateFlow has been optimized for the Virtex-6 family and features increased modularity to help simplify development.

Sunday, 7 February 2010

Heart activity signal processor

At the International Solid State Circuit Conference (San Francisco CA US), imec and Holst Centre report an analog-signal processor ASIC (application-specific integrated circuit) – in short ASP - that reduces the overall power consumption of an ambulatory heart activity signal monitoring systems by more than 5 times. This is a major step towards autonomous wireless sensor systems, which constantly monitor the patient’s health for diagnosis of chronic illness.

In today’s biomedical wireless sensor systems, a lot of power consumption is wasted in the DSP (digital signal processor) or radio by continuously processing biopotential signals (e.g. ECG or electrocardiogram), or transmitting raw data over the wireless link. And, today’s ambulatory biomedical sensor systems also suffer from motion artifacts which affects the robustness of detection algorithms and demands even more processing power.

The innovative ASP, developed within imec’s and Holst Centre’s HUMAN++ program, uses an adaptive sampling scheme based on activity detection. This reduces the amount of data which needs to be processed by the DSP or transmitted by the radio. By preprocessing the signal, a simplified DSP can be used for accurate R-peak detection resulting in lower power consumption of the DSP. Motion artifacts are detected by continuously monitoring the electrode-tissue impedance. The impedance monitoring can also be used for ensuring signal integrity by continuously checking the electrode connectivity.

The ASP has a record low power consumption of only 30µW operating from 2V. It consists of an ECG readout channel, two quadrature readout channels for continuous-time monitoring of electrode-tissue impedance, and two quadrature readout channels for tracking signal fluctuations in a specific frequency band. The ASP also includes an activity detector that senses the frequency content of the ECG signal and adapts the sampling rate of the integrated ADC (analog to digital convertor) for the digitization of the ECG signal. The ASP stage reduces the power consumption of the DSP and wireless transmission by 11 and 6 times respectively. This results in an overall system power dissipation below 300µW for the complete wireless heart activity signal monitoring system which is more than 5 times more power efficient than its predecessors. This power budget also includes the additional functionality of continuous-time electrode-tissue contact impedance measurement.

“Within the Human++ program, imec and Holst Centre develop solutions for an efficient and better healthcare. Self-powered intelligent body area networks with wireless sensors promise to be a solution for more comfortable healthcare systems. This breakthrough is a major step towards constant ambulatory monitoring of people using energy harvesting, which increases the comfort level of patients and is a cost- and time-efficient alternative for current monitoring systems;”
said Bert Gyselinckx, general manager imec the Netherlands at Holst Centre.

Industry can get access to this technology by joining the Human++ program as research partner or by licensing agreements for further product development.